Tips & Hints

Identify Software

Q. How do I use Custom Waveform Viewer with Identify Debugger?

A. In order to view the sampled data, the Identify Debugger tool has an Open Waveform Display icon , which invokes GTKWave waveform viewer, which is freely available. Furthermore, it also provides an interface to invoke Modelsim/Aldec and other waveform viewers. You need to do the following to use them:

1. Invoke the Identify Debugger tool and then go to Options->Debugger preferences.

2. The following options are available:

You may select a waveform viewer of your choice and click OK. However, in such cases you need to make sure that the simulators are installed on to your machine and the path to .exe exists in your $PATH environment variable. The default waveform viewer is GTKWave.

3. Now go back to the Identify Debugger tools main Gui and click on the Open Waveform Display icon .

4. If you chose to use your own waveform viewer, then you can select the Custom Procedure option. You can create an interface that uses your waveform viewer by writing a Tcl procedure to launch your waveform viewer. The Tcl procedure that Interfaces your waveform viewer must be named custom_waveformviewer.

5. Go to the $identify_installation/etc/ directory and open synrc.template.tcl. file.This file contains examples of waveform viewer procedures. You need to write a procedure named “custom_waveformviewer” here. The Tcl procedure should include two main steps. Create waveform data from Identify debugger and display the data. You may refer to existing procedures like “custom_waveformviewer_modelsim” or “custom_waveformviewer_aldec” in the tcl script for more information.

6. Finally, to enable the tcl procedure, rename synrc.template.tcl to synrc.tcl in $identify_installation/etc directory.

7. Invoke the Identify Debugger tool again and click on the Open Waveform Display icon .

Synplify Pro

Q. Is Signed Modulus supported in the Synplify Pro software?

A. Yes signed mod is supported in Synplify_pro, but prior Synplify 8.6 this had a limited supported. The divisor had to be a constant power of 2, or both of the operands had to be constants.

Starting from Synplify Pro version 8.6, this is ruled out. Modulus operation can be applied onto any operand. This would be implemented based on “rem” function. Here are some details regarding the same.

Definition: As per LRM(IEEE Std 1076-2002) section 7.2.6,

The result of modulus operation is such that (A mod B) has the sign of B and an absolute value less than the absolute value of B; in addition, for some integer value N, this result must satisfy the relation:
A = B * N + (A mod B)

While remainder is defined as the result of remainder operation is such that (A rem B) has the sign of A and an absolute value less than the absolute value of B.

Algorithm being implemented, using “rem” function:

For a given equation; result <= A mod B;
When both operands(A,B) are unsigned, “result = rem(A,B)”
When both are signed and B=0, “result <= (others => ‘0’)”**
When msb of {A,B} are 11, “result <= 0-remainder”
When msb of {A,B} are 01, “result <= remainder-B”
When msb of {A,B} are 10, “result <= B-remainder”

Note:

• A_width & B_width can vary, but result_width = b_width.
• 2> **: For unsigned, (A/0) will yield A and for signed (A/0) will yield 0.
• Simulators errors for divison by zero, but for synthesis this has to be treated as don’t cares.
• 3> Behavior is available at $BUILD/lib/vhd/numeric.vhd & numeric_bit.vhd